An Elliott 803 instruction consists of two parts, the opcode, which is defined by 6 bits, and the address, which takes 13 bits. Together these 19 bits can be packed two to a 39-bit word, with an extra bit in between. This extra bit is known as the B-modifier, and, if the bit is a one, it causes the second instruction in the word to be modified by adding the contents of the location specified in the address of the first instruction.
That sounds complicated, but in practice is quite simple. When the first instruction is being executed, the last thing tha happens is that the word specified by the address bits gets written into memory. This happens even when this value has not been changed (e.g. if the instuction is just fetching the content of store to the accumulator). This is because the read operation which takes place at the start of execution is a destructive read - it sets the store location to zero, and so the value must be written back again! As a result, the contents of this memory location are in the store access register at the end of the first instruction. If the B digit is set, this is added to the second instruction as it is being loaded into the instruction register. Note that the adder which does this is unaware of the nature of the instruction - it simply adds two numbers, and so the opcode may also be modified in this process. This can be useful, but it is important to be aware of this fact as it can catch you unawares at times.
Since there are 6 bits for the opcode, there can be 64 instruction. These are arranged in a nice system of 8 groups of 8. The first 4 groups are known as the short instructions, and consist of simple arithemtic and logical manipulations of store and accumumulator. The arithmetic or logical functions are the same in each of the four groups, it is the disposal of results that varies. The following table show these functions. Note that a represent the value in the accumulator before the instruction, and a' the value after execution, while n is the contents of the store location before, and n' the store content after execution.
| ?0 | ?1 | ?2 | ?3 | ?4 | ?5 | ?6 | ?7 | |
|---|---|---|---|---|---|---|---|---|
| 0? | a' = a n' = n | a' = -a n' = n | a' = a+1 n' = n | a' = a&n n' = n | a' = a+n n' = n | a' = a-n n' = n | a' = 0 n' = n | a' = n-a n' = n |
| 1? | a' = n n' = a | a' = -n n' = a | a' = a+1 n' = a | a' = a&n n' = a | a' = a+n n' = a | a' = a-n n' = a | a' = 0 n' = a | a' = n-a n' = a |
| 2? | a' = a n' = a | a' = a n' = -a | a' = a n' = n+1 | a' = a n' = a&n | a' = a n' = a+n | a' = a n' = a-n | a' = a n' = 0 | a' = a n' = n-a |
| 3? | a' = n n' = n | a' = n n' = -n | a' = n n' = a+1 | a' = n n' = a&n | a' = n n' = a+n | a' = n n' = a-n | a' = n n' = 0 | a' = n n' = n-a |
All of the above instructions execute in 576 microseconds on most 803s. A few early models took a little longer, about 720 microseconds.
Although the above instructions are referred to as short instructions, those of group 4 are even faster, taking only 288 microseconds. These instructions did not reference memory, but treated the address fields as a number, referred to as N in this table. Because each word contains two instructions, we refer to the first instruction as N1 and the second as N2. Note that B modification should not be used if jumping to N2! (I think it would be ignored if the bit were set, but I can't confirm this without testing it on the real hardware.)
| 40 | Jump to N1 | 44 | Jump to N2 |
|---|---|---|---|
| 41 | Jump to N1 if a<0 | 45 | Jump to N2 if a<0 |
| 42 | Jump to N1 if a=0 | 46 | Jump to N2 if a=0 |
| 43 | Jump to N1 if overflow set | 47 | Jump to N2 if overflow set |
The two instructions that test for overflow also reset the overflow indicator. Once the indicator has been set, it remains set until either of these instructions is used, or the System Reset button is pressed. Overflow is set if the result of an arithmetic instruction cannot be truly represented within the 39 bit word. For instance if two large positive numbers are added and the result appears to be negative, then overflow has occurred.
The fifth group of instructions are referred to as the long instructions. These can take many machine cycles to complete, depending on the values being operated on. For precise details consult the Elliott manuals until I can find time to include such details here.
Some of the long instructions reference an additional (38-bit) register which is referred to as the Auxiliary Register (ar). In some instructions a and ar are effectively concatenated to form a 77-bit register (sign + 76 bit fraction). We refer to this as a+ar:
| 50 | Halve a+ar N times (shift right N bits with sign propagation). |
|---|---|
| 51 | Shift a right N bits, Clear ar. |
| 52 | a+ar = a x n (double-length product) |
| 53 | a = a x n (rounded single-length product) |
| 54 | Double a+ar N times (shift length N bits) |
| 55 | Shift a left N bits, Clear ar. |
| 56 | a' = a+ar / n (divide double-length), Clear ar. |
| 57 | a' = ar, ar' = 0, sign of a = 0 |
Group 6 in a basic 803 acted in the same was as the 00 instruction. An optional extra (required if Algol was to be used) was a floating point unit. This performed single-precision floating point arithmetic as follows:
| 60 | a' = a + n |
|---|---|
| 61 | a' = a - n |
| 62 | a' = n - a |
| 63 | a' = a x n |
| 64 | a' = a / n |
| 65 | see below |
The remaining two instructions did perform useful functions but were undocumented, so I've left them out.
The 65 instruction had two modes of operation. If the value of N was less than 64, it acted as a fast left shift, taking only 576 microseconds as opposed to 576 + 288*N microseconds for the 55 instruction. This allowed the fast bootstrap loader to match the speed of the tape reader. If N was 4096, then the 65 instruction performed a floating-point standardise instruction. This converted an integer in the accumulator into a floating point number. This involves shifting left a suitable number of digits and adding in an appropriate exponent.
Finally we come to the Group 7 instructions. These perform various functions, primarily related to I/O, with the exception of 73:
| 70 | a' = Word Generator (see below) |
|---|---|
| 71 | a' = read tape character |
| 73 | n' = SCR (see below) |
| 74 | Punch N to tape/printer |
The omitted functions were not used on the normal 803. They behaved as 00 unless special hardware had been installed to support Magnetic Tape or a Digital Plotter. There is a section of code relating to magnetic tape in the Algol compiler - it could be used to store object code if the hardware was available. I don't propose to discuss this further at this stage.
The 70 instruction read the Word Generator, a set of 39 buttons on the operator console, into the accumulator. This could be used to effect a small amount of control over the running of a program. The compiler uses it to support the various pause or wait states, and it could also affect diagnostic output from running programs.
The 73 instruction was used to implement subroutine calls. The SCR (Sequence Control Register) is what is usually referred to as the Program Counter in more modern machines. This contained the address of the current instruction. A typical subroutine call would be:
73 1263 : 40 1264
This would write the address of this instruction into location 1263
(or wherever was appropriate), and then jump to 1264. When the subroutine
had finished, to return to the main program, it would execute:
00 1263 / 40 1
This would reference the stored address, and modify the jump instruction
so that it jumped to the location following the original call. It was
also possible to pass arguments to subroutine by storing them in locations
following the call, and then the subroutine would return by jumping to
the location following these arguments.
| ?0 | ?1 | ?2 | ?3 | ?4 | ?5 | ?6 | ?7 | |
|---|---|---|---|---|---|---|---|---|
| 0? | o00 | neg | o02 | and | add | sub | cla | bus |
| 1? | exa | o11 | exc | exn | o14 | o15 | stc | o17 |
| 2? | sto | stn | inc | ans | ads | sbs | cls | o27 |
| 3? | lod | lcs | lis | lns | las | lss | lzs | o37 |
| 4? | jmp | jn | jz | jo | o44 | o45 | o46 | o47 |
| 5? | sra | srl | mul | mur | sla | sll | div | ara |
| 6? | fad | fsb | fna | fmu | fdv | fsh | o66 | o67 |
| 7? | kbd | inp | o72 | lnk | otp | o75 | o76 | o77 |
In addition there are 3 additional mnemonics:
A further point: there are simple macros that test for the inverse of the conditions provided, i.e. jnn, jnz and jno, these expand to a pair of jumps in order to simulate these non-existing instructions.
Page created by Bill Purvis, laste update 4th January, 2004